The invention relates to an integrated circuit OS testing machine, which comprises a control unit, a power supply module, test socket, scan test module, indication module and a control button; test socket is used for inserting IC; scan test module includes a current generating circuit, switch control circuit and voltage testing circuit, current generation circuit for providing a constant current through the test the socket pins of the IC switch, the control circuit is used to control the grounding pin IC, voltage test circuit for voltage test pin; the control button is used to control the testing machine in the scanning mode and test mode switching; the control unit is used to get the pin yield distribution of IC in scanning recognition mode, and to test the IC open / short circuit testing and failure information output to the indication module failure information indicator under test mode. The invention also relates to an integrated circuit OS testing method. The invention only needs to place a good product IC for scanning identification at the beginning, and then the continuous testing of the measured IC can be carried out later.
【技术实现步骤摘要】
【技术保护点】
一种集成电路开/短路测试方法,包括下列步骤:将集成电路芯片良品插入测试插座内;测试所述集成电路芯片良品的每个管脚与其余所有管脚间的对地二极管的数量,得到所述每个管脚与其余所有管脚间的对地二极管分布信息;将与其余所有管脚间对地二极管数量最多的一管脚判定为第一地脚;测试所述集成电路芯片良品的每个管脚与其余所有管脚间的对电源二极管的数量,得到所述每个管脚与其余所有管脚间的对电源二极管分布信息;将与其余所有管脚间对电源二极管数量最多的一管脚判定为第一电源脚;根据所述第一地脚与其余所有管脚间的对地二极管分布信息和第一电源脚与其余所有管脚间的对电源二极管分布信息,得到管脚分布表;将待测集成电路芯片插入测试插座内;读取所述管脚分布表;根据所述管脚分布表配置所述待测集成电路芯片的第一地脚并进行扫描测试,若测试结果与所述对地二极管分布信息不一致,则判定所述待测集成电路芯片失效;根据所述管脚分布表配置所述待测集成电路芯片的第一电源脚并进行扫描测试,若测试结果与所述对电源二极管分布信息不一致,则判定所述待测集成电路芯片失效。
【技术特征摘要】
【专利技术属性】
技术研发人员:顾汉玉,
申请(专利权)人:华润赛美科微电子深圳有限公司,
类型:发明
国别省市:
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