A clock recovery device (300) and a clock recovery method in which a signal clock compensator (301) is used to adjust and output the clock phase of the first and second signals in the frequency domain according to B and C parameters, and a signal regulator (302) is used to adjust the clock phase according to A parameters. 1. Polarization angle adjustment of the second signal and determination of target positive and negative spectrum information. Phase discriminator (303) is used to determine clock error signal based on target positive and negative spectrum information. Loop filter (304) is used to filter clock error signal and integral branch from loop filter (304). The signal from the circuit is used as the monitoring signal; the interpolation controller (305) is used to determine the B parameter according to the filtered clock error signal; the signal characteristic parameter modifier (306) is used to determine whether the monitoring signal is within the preset fluctuation range; and if not, the A parameter and C parameter are adjusted to make the monitoring signal within the preset fluctuation range.
【技术实现步骤摘要】
【国外来华专利技术】PCT国内申请，说明书已公开。
【技术保护点】
PCT国内申请，权利要求书已公开。
【技术特征摘要】
【国外来华专利技术】PCT国内申请，...
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