The embodiment of the invention provides a device and the link clock recovery method, the method includes: to convert analog signals into digital signals after filtering, filtering the digital signal to obtain the data; according to the calculation of the data after filtering, which link relative to the phase error of the local clock, and statistical phase error accumulation using phase value; the error of clock recovery and filter processing, produce frequency offset adjustment signal, the frequency offset adjustment signal is converted to a voltage control signal; phase error using the accumulated value of the phase error compared with the preset threshold, generate a comparison result; according to the calculation result comparison, control signals are generated to control the link recovery clock phase adjustment the adjusted by controlling the voltage signal; the link clock frequency, and by controlling the link clock recovery A phase modulated control signal adjusts the phase of the link recovery clock to perform clock recovery. The invention supports correct recovery of link clocks at high rates or when a link has a large frequency offset.
【技术实现步骤摘要】
【技术保护点】
１．一种链路时钟恢复方法，其特征在于，所述方法包括：将模拟信号转换成数字信号后进行滤波，获取对所述数字信号进行滤波后的数据；根据所述滤波后的数据计算，产生链路相对于本地时钟的相位误差，并统计相位误差累加值；利用所述相位误差进行时钟恢复和滤波处理，产生频偏调整信号后，将所述频偏调整信号转换为控制电压信号；利用所述相位误差累加值，与预设的相位误差门限比较，产生比较结果；根据所述比较结果计算，产生控制所述链路恢复时钟相位调整的控制信号；利用所述控制电压信号对所述链路恢复时钟的频率进行调整，并利用所述控制所述链路恢复时钟相位调整的控制信号对所述链路恢复时钟的相位进行调整，以进行时钟恢复。
【技术特征摘要】
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