A programmable interrupt controller, including bus interface module, interrupt sampling module, common interrupt request logic processing module, logic processing module, fast interrupt request priority comparison module and signal mixing module; the bus interface module is a programmable interrupt controller and APB bus interface, a register file, the APB bus access the module registers in the processor core through the bus, can in the module register read and write operations, other modules can access the module in the register; the interrupt sampling module is sampling interrupt source module includes a plurality of identical structure module, the module, internal interrupt and external interrupt sampling soft interrupt, interrupt type and judgment, detect the interrupt mask in the module in the sample; Interrupt on the interrupt request register; interrupt sampling to each sub module is connected to the common request interrupt priority comparison module, interrupt priority for comparison; fast interrupt sampling of each sub module to request a connection to the fast interrupt request processing logic module, fast interrupt request interrupt; the module to process the interrupt request the response signal returned from the mixed signal module, the interrupt sampling allows for processing; the priority comparison module includes a plurality of interrupt priority comparison module; priority comparison module can interrupt priority line form; comparative priority comparison module for the ordinary interrupt priority; after the interrupt priority is completed and to the general interrupt request logic module send the relevant letter Information; the fast interrupt request logic processing module provides fast interrupt vector registers and interrupt register for field bus interface module; interrupt sampling module when sampling to fast interrupt, to fast interrupt request logic module generates corresponding fast interrupt request, fast interrupt request processing logic module transmits the corresponding interrupt vector in fast interrupt the interrupt vector registers, and a fast interrupt request interrupt request to the processor core; the common interrupt logic module provides common interrupt vector registers and interrupt register for field bus interface module; interrupt sampling module in the sampling time to IRQ, a common interrupt request to the priority comparison module, priority comparison module through priority comparison get a highest priority To interrupt the common interrupt request logic module, common logic module interrupt request the interrupt corresponding interrupt vector in the interrupt vector register, and a common interrupt request interrupt request to the processor core. The mixed signal module is to fast interrupt request logic processing module and response signal of ordinary interrupt request logic processing module generates part for processing the output to the interrupt sampling module or bus interface module; the signal output will also be part of the bus interface module for fast interrupt request processing module logic or common logic module interrupt request.
【技术实现步骤摘要】
本专利技术涉及SOC(片上系统)上众多主设备(master)中断、从设备(slave)中断、软中断和外部中断的处理技术。具体来说,就是涉及能够从众多主设备中断、从设备中断、软中断和外部中断中选出优先级最高的中断,并向处理器内核(ARM core)发起中断请求的中断控制装置。
技术介绍
可编程中断控制器是应用于SOC(片上系统)设计中的一个模块。SOC设计中包含了众多硬件模块和软件的设计,很多硬件模块都会输出一个或者几个中断,还有软件中断和外部中断,在整个系统中,中断会达到几十个,而处理器内核(ARM core)仅有两个中断请求信号可以输入,所以,中断必须先经过处理才能进入处理器内核。可编程中断控制器就是用来进行中断在进入处理器内核前的处理。在现有的技术中,中断控制器功能比较单一,配置不灵活、可重用性差。中断控制器一般有几个寄存器中断源寄存器、中断屏蔽寄存器、中断挂起寄存器,寄存器的每一位对应一个外部中断源。中断源寄存器接收外部中断源的中断请求,中断屏蔽寄存器对外部中断源进行屏蔽检测,经过屏蔽检测的中断放进中断挂起寄存器中,中断挂起寄存器进行位或操作后向处理器内核发起一个中断,处理器内核读中断挂起寄存器,并根据位的位置来判断中断的优先级,并执行相应的中断程序。在现有技术下的中断控制器的功能受到很大的限制,中断优先级、中断触发类型、中断类型、软中断等都不能灵活配置,不支持中断嵌套、中断共享等功能。专利号为01101691的中国专利,题目为包含一个中断强制寄存器的灵活中断控制器。该专利在普通中断控制器的基础上解决了软中断的配置,它通过软件写中断强制寄存器触发 ...
【技术保护点】
【技术特征摘要】
【专利技术属性】
技术研发人员:林云东,林晓涛,尹冬元,
申请(专利权)人:中兴通讯股份有限公司,
类型:发明
国别省市:
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